Xilinx Vivado Design Suite 2015.4 ISO-TBE

Vivado Design Suite 2015.4现已推出！该最新版本包含：
全新 Vivado Lab Edition，这是 Vivado 设计套件的一个无成本的轻量级编程调试版本
交互式时钟域的交叉分析
加速型 Vivado 仿真器与第三方仿真流
Xilinx SDK 高级系统内性能分析与验证
Vivado? Design Suite 提供了一个全新构建的SoC 增强型、以 IP 和系统为中心的新一代开发环境，致力于解决系统级集成和实现的生产力瓶颈。 Vivado Design Suite 在总体生产力、易用性和系统级集成能力方面领先一代。
加速实现
设计实现时间缩短 4 倍
设计密度提升 20%
高达 3 速度级的性能优势; 功耗降低 35%
加速集成
基于C 的 IP 和 VIVADO HLS
集成
基于模型的 DSP 设计和 System Generator for DSP
集成
基于模块的 IP 和 VIVADO IP Integrator 集成
加速验证
面向设计和仿真的集成设计环境
全面的硬件调试
使用 C、C++ 或 SystemC 加速验证超过 100 倍
Xilinx Vivado Design Suite 2015.4 ISO | 8.9 Gb
The Vivado? Design Suite delivers a SoC-strength, IP-centric and system-centric, next generation development environment that has been built from the ground up to address the productivity bottlenecks in system-level integration and implementation. The Vivado Design suite is a Generation Ahead in overall productivity, ease-of-use, and system level integration capabilities.
Accelerating Implementation
- 4X Faster Implementation
- 20% Better Design Density
- Up to 3-Speedgrade Performance Advantage and 35% Less Power
Accelerating Integration
- C-based IP Generation with Vivado High Level Synthesis
- Model-based DSP Design Integration with System Generator for DSP
- Block-based IP Integration with Vivado IP Integrator
Accelerating Verification
- Integrated Design Environment for Design and Simulation
- Comprehensive Hardware Debug
- Accelerate Verification by >100X with C, C++ or SystemC